Permanent Magnet Synchronous Motors (PMSMs) are widely used in industries, and high-speed PMSMs are becoming common. Digital control systems are frequently used for PMSM control, which introduce control delays. These delays may reduce the bandwidth of the control loop and even cause the current regulator to lose stability. Complicated algorithms are often proposed to alleviate control delays. This paper attempts to address this problem from another perspective. A high-speed coprocessor working with a RISC-V processor core is proposed; both of them are implemented on an FPGA. The coprocessor not only implements the basic functions of FOC and SVPWM and integrates current-loop and speed-loop control, but more critically, it also implements a sliding mode observer for rotor position estimation for sensorless control of PMSMs. Simulations and experiments are conducted to verify the effectiveness of the proposed architecture, and a computational speedup of more than 20 times is achieved. Permanent Magnet Synchronous Motors (PMSMs) have many advantages, e.g., high efficiency, high power density, excellent dynamic performance and precise control. They are used in a variety of applications, such as electric vehicles, industrial robotics, CNC machines, HVAC compressors, aerospace and defense and home appliances. Digital control systems are frequently used for high-speed motors, especially for PMSMs and brushless DC motors, which introduce control delays. The sampling delay or current loop computation delay is often neglected under the assumption that the fundamental component of current is instantaneously sampled at the midpoint of zero space vectors [ 1]. If this assumption is violated, these delays may reduce the bandwidth of the control loop and even cause the current regulator to lose stability. On the other hand, many ultra-high-speed PMSMs have become common, with speeds exceeding 40,000 rpm and even reaching 550,000 rpm [ 2, 3]. Consequently, short control delays become even more critical and need to be greatly reduced. As a result, considerable efforts have been made to shorten or compensate for these delays to improve regulator performance. For this purpose, some researchers have developed complicated algorithms implemented in software; however, such software-based approaches heavily depend on the researcher’s expertise. In contrast, an alternative way is to use ultra-high-speed processing units, which can quickly produce calculation results and greatly simplify the design of compensation algorithms. Sliding Mode Control (SMC) has undergone extensive research in PMSM control, owing to its robust anti-disturbance capability and high stability in the presence of parameter variations. Advanced PMSM sliding mode control algorithms achieve high performance, but may exhaust the computation capability of typical DSPs (TMS320F28335). A higher-Order Sliding Mode Observer (HOSMO) or Super-Twisting Extended State Observer (STESO) combined with advanced reaching law significantly increases computational load per cycle. Exponential Reaching Law (ERL) introduces minimal overhead (≈5–10 cycles) with fixed parameters and a single nonlinear operation, making it suitable for resource-constrained or high-speed PMSM control. However, New Sliding Mode Reaching Law (NSMRL) incurs medium–high overhead (≈80–120 cycles, ∼10 times ERL), while Modified Variable ERL (MVERL) imposes the highest overhead (≈100–150 cycles, ∼12 times ERL) [ 4 To bridge the gap between limited computation capability and advanced algorithms, new control units involving FPGAs are promising solutions. FPGAs are used in automation processes due to their advantages, such as flexible programming and scalable implementation, which allow them to meet application-specific requirements. They also offer faster speed response and lower cost compared to other systems. Their algorithmic solving process is performed in parallel, enabling them to handle MIMO (multiple-input multiple-output) systems efficiently [ 5]. Furthermore, some FPGA boards can send data to cloud web servers, which can therefore help predict or prevent potential issues [ 6 Texas Instruments’ TMS320F28002x series DSPs are widely used for motor control. However, with the rapid proliferation of RISC-V, these open instruction set architecture (ISA) cores have also entered the field of digital signal processing. The RISC-V ISA, which enables modular and extensible design implementations, provides an ideal foundation for low-power embedded applications. By extending baseline RISC-V implementations with DSP capabilities alongside the RISC-V Vector Extension (RVV), significant improvements in cycle count performance and power efficiency can be achieved, while maintaining backward compatibility and maximizing software reuse for a wide range of signal processing workloads. The Nios V, launched by Intel FPGA in 2021 (Quartus Prime Pro 21.3+), is a RISC-V soft-core processor with its compact core targeting Pro-supported FPGAs and a roadmap for standard-software devices [ 7]. The MicroBlaze V, launched by AMD in 2024, is a RISC-V soft-core IP for its adaptive SoCs and FPGAs that leverages the open-source RISC-V ecosystem, remains hardware-compatible with classic MicroBlaze, and is fully integrated into Vivado and Vitis tools [ 8]. Other typical examples include Synopsys’ ARC-V RMX-100D and RMX-500D series processors [ 9 To mitigate the effects of system dynamic uncertainty, Chou et al. [ 10] developed an FPGA-based neural fuzzy controller (NFC) for PMSM speed regulation. A radial basis function neural network (RBF NN) is employed to adapt the fuzzy controller parameters. Co-simulation was performed using Simulink for the PMSM and inverter and ModelSim for the VHDL implementation of the controller. Simulation results confirm the effectiveness of the proposed approach. The design was realized on an Altera Cyclone II EP2C70 FPGA. Although no CPU core was utilized for real-time control, the performance of the hardware implementation was compared with that of a pure software solution running on a Nios II soft-core processor. Xin et al. proposed a hardware–software co-design scheme for multi-axis servo control, where a coprocessor IP for current-loop acceleration is interfaced with a 32-bit RISC-V core via the AMBA bus [ 11]. Within this scheme, the RISC-V core handles software-based control tasks—specifically, the conventional PI controllers for the speed and position loops—as well as supporting tasks such as system initialization, electrical angle calculation, and coprocessor configuration. The hardware coprocessor IP, meanwhile, accelerates the computationally intensive and real-time critical current loop (FOC, SVPWM, and observer). Implemented in the CSMC 90 nm CMOS process, the design achieved low area and low power consumption, making it suitable for general-purpose SoCs. Mishra et al. proposed a finite-set model-predictive control (FS-MPC) algorithm for a motor drive system [ 12]. While this algorithm provides fast dynamic response and the ability to handle multiple constraints, its computational burden requires FPGA-based implementation to satisfy real-time requirements. In their implementation, all control algorithms are directly compiled into hardware logic circuits using the Xilinx System Generator (XSG) tool. Although the Zynq chip used in this work does contain an ARM CPU, it is not utilized. Ma et al. proposed an FPGA implementation of a sensorless controller for a surface-mounted PMSM. Position and speed are both estimated using a sliding mode observer (SMO), where the sliding mode manifold is chosen based on the actual stator current trajectory. In the SMO, a sign function of the current error is adopted in the feedback correction. Experimental results show that the proposed FPGA-implemented sensorless SMO for PMSM drives is robust and has high performance [ 13]. A Nios II soft-core processor is employed solely for system debugging, online monitoring, and data exchange with hardware modules, but not involved in any real-time control tasks. Than et al. designed a combined EKF and RBFNN on an FPGA to cope with system dynamic uncertainties and external loads [ 14]. The EKF estimates rotor position and speed for sensorless PMSM control, while the RBFNN with an adjustable parameter mechanism is applied to the speed control loop. The proposed algorithm was verified through both simulation and physical experiments. In addition to the FPGA hardware logic, an Altera Nios II soft-core processor is employed. It handles speed command generation, data acquisition, and external device communication, but it is not involved in real-time control tasks. To combat the control delays incurred by a digital system, Wang et al. proposed a coprocessor based on a Hummingbird V2 E203 RISC-V processor core and Xilinx Zynq SoC for ultra-high speed PMSM control [ 15], which enables operation at speeds above 20,000 rpm. On the FPGA, IPs for Park, Clarke, inverse Park, and proportional–integral (PI) controller were built. Unlike the work presented in this paper, the sliding mode observer was run on a RISC-V CPU core, and ADC was used to measure the stator current directly. Weber et al. proposed an FPGA-based dead-time compensation method using current oversampling and linear least mean squares regression [ 16]. The FPGA predicts phase currents before each switching instant via a parallel-processed predictor and corrects the duty cycle using a lookup table obtained from offline auto-commissioning. This online compensation improves current waveform quality at very low speeds, reduces torque ripple, and enables higher-quality signal injection for sensorless control of PMSMs. By combining this predictive dead-time compensation with the rotor position estimation, the low-speed limit of PMSM speed can be reduced to 0.5% of the rated speed [ 17 The main objectives of this paper are: For high-speed PMSM control, a RISC-V CPU-coprocessor architecture is designed. The RISC-V CPU core is in charge of system initialization or configuration, while the FPGA portion is used as a coprocessor. Targeting sensorless PMSM control, the coprocessor not only accelerates the traditional speed loop and current loop, but also accelerates a sliding mode observer (SMO) to estimate the rotor position. The advantage of this architecture is its flexibility: the RISC-V core can configure the coprocessor with different parameters to adapt to various types of PMSMs. In contrast, a standalone CPU (without a coprocessor) may struggle with complex computational loads, while an FPGA-only control unit would require redesigning the Verilog code. Another advantage is its potential scalability: coordinating multiple distributed PMSMs via network-based data exchange is straightforward—for instance, in a four-wheel vehicle with independent PMSMs, where network-coordinated torque distribution based on steering angle enables precise electronic differential steering. Although the studies in [ 11, 13, 14, 15] employ a CPU core to configure a coprocessor, only the studies in [ 11, 15] employ a RISC-V–FPGA architecture. Two features differentiate our coprocessor from the coprocessors reported in [ 11, 15]: (a) it employs a sliding mode observer (SMO), which provides better control performance and robustness; (b) it accelerates both the current loop and the speed loop, enabling faster computation—critical for high-speed and ultra-high-speed PMSM control. Among the related works, only the study in [ 13] employs an SMO, but it uses a s g n ( · ) switching function in its sliding law. In contrast, our SMO adopts a t a n h ( · ) function in the sliding law, which is well known to outperform both s g n ( · ) s a t u r a t i o n ( · ) [ 18 The organization of this paper is as follows. Section 1 reviews related works. Section 2 then presents the principle behind this work. Section 3 discusses the proposed coprocessor IP design. Section 4 analyzes the experimental results. Section 5 concludes the paper. 2. The Proposed Architecture Field-oriented control (FOC) of PMSMs highly depends on angular speed ω and electrical angle θ e . Physical encoders, such as magnetic or optical encoders, may be used to measure the rotor position or mechanical angle. Physical sensors can measure the rotor position accurately, but they introduce extra cost and complexity and reduce system reliability. Another approach is to estimate the rotor position using mathematical methods and the PMSM model, thereby eliminating the need for a physical encoder. In this paper, a sensorless PMSM control scheme based on a sliding mode observer (SMO) is adopted. An SMO scheme is chosen for FPGA implementation for the following reasons: (1) The SMO architecture offers strong robustness. The sliding mode variable structure inherently possesses excellent characteristics, namely insensitivity to system parameter perturbations (e.g., stator resistance and inductance) and external disturbances [ 19, 20]; therefore, it can maintain good estimation stability and accuracy even under sudden load changes. (2) Compared with the extended Kalman filter (EKF), which involves many complicated matrix operations, the SMO offers simpler computations and clear physical interpretations. The SMO scheme switches between two nonlinear functions and forces the system state to converge to a predefined sliding mode surface. (3) Classical SMOs may be subject to chattering when power semiconductor devices (e.g., IGBT, SiC) switch at high frequency, which can degrade estimation accuracy. However, this issue can be resolved by incorporating modified nonlinear functions into the SMO. The speed/current dual-loop structure is a widely used control approach for PMSMs, significantly improving control accuracy and disturbance rejection. In this structure, the outer loop handles speed regulation, while the inner loop performs precise current control. Each loop employs a PI controller that processes its own input error signal. The overall architecture of the sensorless PMSM control system is shown in . The system consists of an SVPWM module that generates PWM voltages to drive the PMSM, and a sliding mode observer (SMO) that estimates the rotor position and speed. Additionally, the system conventionally includes Clarke, Park, and inverse Park transforms, along with current PI and speed PI regulators. Suppose u α , u β , i α i β are the voltage and current in the α − β frame can be described as Equations ( 1) and ( 2) respectively: u α u β = R i α i β + L d d t i α i β + ω e ψ f − s i n ω e c o s ω e (1) where RL are the resistance and inductance of the stator of the PMSM, and ω e ψ are the electrical angular speed and the magnetic flux linkage generated by permanent magnets. The last term denotes the back electromotive force (back-EMF). The stator current can be characterized as: d d t i α i β = − R L i α i β + 1 L u α u β − 1 L e α e β (2) Let i α β = i α i β e α β = e α e β ; Equation ( 2) can be discretized as: i α β ( k + 1 ) = A i α β ( k ) + B u α β ( k ) − B e α β ( k ) (3) where A = e ξ T s = e − R L T s 0 0 e − R L T s (4) B = ∫ 0 T s e ξ τ Λ d τ = 1 R 1 − e − R L T s 0 0 1 R 1 − e − R L T s (5) with ξ = − R L 0 0 − R L Λ = 1 L 0 0 1 L . Suppose i ^ α ( n ) i ^ β ( n ) are the estimated values of i α ( n ) i β ( n ) respectively, and define i ˜ α ( n ) = i ^ α ( n ) − i α ( n ) , i ˜ β ( n ) = i ^ β ( n ) − i β ( n ) , using a traditional SMO method [ 19, 20], the continuous model of SPMSM can be discretized as the following equations: i ^ α β ( n + 1 ) = A i ^ α β ( n ) + B u α β ( n ) − e ^ α β ( n ) − k z i ˜ α β ( n ) (6) e ^ α β ( n + 1 ) = e ^ α β ( n ) + μ B − 1 i ˜ α β ( n ) − A i ˜ α β ( n − 1 ) + k z i ˜ α β ( n − 1 ) (7) where the z function is used as the SMO control law, frequently z may be a s g n ( · ) or s a t u r a t i o n ( · ) function, and k is the sliding mode gain, with B − 1 = R 1 − e − R L T s 0 0 R 1 − e − R L T s (8) If those exponential terms in Equations ( 4) and ( 8) are expanded with Taylor series, and only when those high order terms in the Taylor expansion can be omitted, then A = e ξ T s ≈ 1 − R T s L 0 0 1 − R T s L (9) B − 1 ≈ L T s 0 0 L T s (10) 2.1. Improved SMO Current Observer The improved sliding mode observer (SMO) structure is shown in . It has four components: the current observer, which calculates the stator current i ^ α i ^ β ; a tanh ( · ) function replacing the traditional sgn ( · ) or saturation ( · ) function used as the sliding mode control law z α z β ; a disturbance-model-based back-EMF observer that estimates the back electromotive force (back-EMF) e ^ α e ^ β in the stationary α β frame; and a PLL that estimates the rotor angular position and angular speed θ ^ e ω ^ e . The first modification involves introducing the estimated back-EMF components e ^ α ( n ) e ^ β ( n ) into the SMO current observer. In a classical SMO, the EMF is extracted via a low-pass filter that operates on high-frequency switching signals, which inherently introduces chattering. To address this issue, a different approach is taken: the estimated EMF is fed back into the SMO current observer, as described below: i ^ α ( n + 1 ) i ^ β ( n + 1 ) = 1 − R T s L i ^ α ( n ) i ^ β ( n ) + T s L u α ( n ) − e ^ α ( n ) − k tanh ( i ˜ α ( n ) ) u β ( n ) − e ^ β ( n ) − k tanh ( i ˜ β ( n ) ) (11) where A = 1 − R T s L B = T s L . The second modification replaces the conventional sgn ( · ) or saturation ( · ) function with a tanh ( · ) function as the SMO law. The traditional sgn ( · ) function tends to cause significant chattering, and the effectiveness of an observer using sgn ( · ) heavily depends on the low-pass filter at the output. The saturation function, in contrast, has a fixed slope in the linear range. A high slope narrows the linear range and reduces chattering suppression capability; conversely, a low slope may effectively suppress chattering but slows convergence to the sliding mode surface. The tanh ( · ) function outperforms both the saturation ( · ) sgn ( · ) functions [ 18]. The sgn ( · ) function tends to induce severe chattering, necessitating a high-quality low-pass filter. While a very low cutoff frequency is often required to achieve satisfactory filtering, it introduces considerable phase delay, making it difficult to strike an optimal balance. A comparison of these three functions is presented in Equation ( 12) and . tanh ( x ) = sinh x cosh x = e x − e − x e x + e − x (12) The back electromotive force (back-EMF) can be reconstructed as Equation ( 13) [ 18, 21]: e ^ α ( n + 1 ) e ^ β ( n + 1 ) = e ^ α ( n ) e ^ β ( n ) + μ B − 1 i ˜ α ( n ) i ˜ β ( n ) − A i ˜ α ( n − 1 ) i ˜ β ( n − 1 ) + k tanh ( i ˜ α ( n − 1 ) ) tanh ( i ˜ β ( n − 1 ) ) (13) or e ^ α ( n ) e ^ β ( n ) = e ^ α ( n − 1 ) e ^ β ( n − 1 ) + μ B − 1 i ˜ α ( n − 1 ) i ˜ β ( n − 1 ) − A i ˜ α ( n − 2 ) i ˜ β ( n − 2 ) + k tanh ( i ˜ α ( n − 2 ) ) tanh ( i ˜ β ( n − 2 ) ) (14) e ^ α β ( n + 1 ) = e ^ α β ( n ) + μ B − 1 i ˜ α β ( n ) − A i ˜ α β ( n − 1 ) + k tanh i ˜ α β ( n − 1 ) (15) where A = 1 − R T s L , B − 1 = L T s come from Equations ( 9) and ( 10), respectively, and μ is a constant which controls the time-step length for computational stability. It is worth noting that the Taylor series expansion may suffer from precision problems when higher-order terms are ignored. Fortunately, the SMO has intrinsic robustness and is insensitive to parameter perturbations. 2.2. Electrical Angle and Rotation Speed Estimation with Phase Lock Loop Traditionally, the electrical angle is obtained via θ e = arctan − e α e β . However, this method is highly sensitive to noise. Since the rotational speed ω e = θ ˙ e is derived from the electrical angle, the differentiation process further amplifies the noise. To overcome this issue, a phase-locked loop (PLL) is employed to estimate both θ e ω e . The PLL does not directly calculate θ ^ e ω ^ e . Instead, it operates as a feedback system driven by the error signal ϵ defined in Equation ( 16). When ϵ converges to zero, the PI regulator produces ω ^ e , which is subsequently integrated to obtain θ ^ e . ε ( n ) = − e ^ α ( n ) cos θ ^ e ( n ) − e ^ β ( n ) sin θ ^ e ( n ) = ω e ( n ) ψ f sin θ e ( n ) cos θ ^ e ( n ) − ω e ψ f cos θ e ( n ) sin θ ^ e ( n ) = ω e ( n ) ψ f sin ( θ e ( n ) − θ ^ e ( n ) ) (16) with ω ^ e ( n ) = K p p l l ε ( n ) + K i p l l T s ∑ i = 0 n ε ( i ) (17) Applying backward Euler formulation, the θ ^ e can be estimated as: θ ^ e ( n ) = K p p l l T s Z Z − 1 ω ^ e ( n ) (18) The stability of the improved SMO current observer can be guaranteed by choosing appropriate parameters. More detailed analysis can be seen in Appendix A. 4. Experimental Results 4.1. Simulation with an Ultra-High-Speed PMSM Unlike a DSP, an FPGA can support the higher switching frequencies essential for ultra-high-speed PMSMs. Leveraging this capability, the proposed FPGA-based coprocessor is evaluated using an ultra-high-speed PMSM model. The motor and simulation parameters are summarized in Table 3. The motor has a rated speed of 170,000 rpm, corresponding to a fundamental frequency of approximately 2833 Hz. The results of a PMSM start-up simulation are shown in . After startup, the PMSM operates smoothly at a switching frequency of 50 kHz (blue line). However, when the switching frequency reduce to 20 kHz (red line), oscillations (i.e., out-of-step) appear in the rotational speed once the motor reaches 15,000 rpm. This behavior occurs because the switching frequency of the power semiconductor devices limits the achievable bandwidth of the current control loop. A lower switching frequency results in slower current regulation dynamics. Consequently, when the motor operates at high speed, the current controller may saturate due to the limited voltage margin, leading to a loss of synchronism. illustrates the phase A current (left vertical axis) with red lines when the PMSM is running at 170,000 rpm. From top to bottom, the three current waveforms correspond to switching frequencies of 20 kHz, 50 kHz and 100 kHz, respectively. It can be observed that harmonics decrease significantly as the switching frequency increases. The currents in phases A, B and C have identical waveforms but are phase-shifted by 120°. An FPGA inherently supports higher PWM switching frequencies than a DSP. The same figure also presents the rotational speed with blue lines (right vertical axis). As can be seen, when the switching frequency increases, the oscillations in the rotational speed decrease noticeably. 4.2. Simulations with a Mid-Speed PMSM The proposed SMO is evaluated through simulations of a mid-speed PMSM (parameters listed in Table 4). Both the improved SMO and a traditional SMO are tested, with results shown in . The improved SMO tracks the electrical angle more quickly and accurately. The traditional SMO uses a s g n ( · ) switching law. A low-pass filter extracts the back-EMF e ^ α e ^ β , from which the electrical angle θ ^ e and angular speed ω ^ e are estimated via a r c t a n ( · ) [ 26 In , (a) illustrates the performance of the traditional SMO without EMF feedback, (b) the traditional SMO with EMF feedback, (c) the improved SMO without EMF feedback, and (d) the improved SMO with EMF feedback. For each case, the variance and RMS between the estimated and real electrical angles are calculated, and the results are summarized in Table 5. The table highlights the contribution of the sliding switching function and EMF feedback. Without EMF feedback, replacing s g n ( · ) with t a n h ( · ) can reduce the variance (RMS) from 0.307 ( 0.559 ) to 0.089 ( 0.303 ). With EMF feedback, the variance (RMS) of the traditional SMO reduces from 0.307 ( 0.559 ) to 0.118 ( 0.349 ), while that of the improved SMO reduces from 0.089 ( 0.303 ) to 0.006 ( 0.077 ).The effectiveness of t a n h ( · ) and EMF feedback is verified. To test the robustness of the proposed coprocessor, different rotational speed instructions are applied over a 0.5 s period. As illustrated in , the coprocessor is able to follow the rotational speed instructions accurately. 4.3. Physical Experiments with a Mid-Speed PMSM The Hummingbird V2 E203 RISC-V processor core and the coprocessor are implemented on a Xilinx Zynq-7020 FPGA platform. The CPU core operates at 32 MHz, while the coprocessor operates at 100 MHz. A physical surface-mounted permanent magnet synchronous motor (SMPMSM) is used, with parameters detailed in Table 4. An angle position sensor MT6835 (equivalent to AS5048) is used to measure the mechanical angle θ m , which can be converted into electrical angle θ e = θ m · p with p denoting the number of pole pairs. The experiment platform is shown as . illustrates the PMSM operation: starting from 0 rpm, accelerating to approximately 4000 rpm, maintaining this speed for a short period, then decelerating, and finally stabilizing at 3000 rpm (right vertical axis). The same figure also presents the electrical angle (left vertical axis). The red line denotes the actual rotor position θ e obtained with an MT6835, while the blue line represents the estimated position θ ^ e . After a brief initial convergence phase, the SMO tracks the angular position quickly and accurately, with a small tracking error. 4.4. Resource Consumption and Computation Speedup Resource consumption of the CPU core and the coprocessor is listed in Table 6. From the table, it can be seen that 69% of the LUTs, 23% of the flip-flops, 46% of the Block RAMs, and 62% of the DSPs are utilized. Therefore, resource consumption is affordable to implement a dual-loop PMSM control unit with SMO rotor position estimation. Table 7 summarizes the hardware specifications of the proposed coprocessor and several popular PMSM control MCUs. Compared with the TI F2803x, the proposed CPU-coprocessor unit achieves a 20× speedup at approximately 1.7 times its operating frequency; compared with the ST STM32G4, it achieves a 28× speedup at a lower operating frequency; and compared with the Infineon XMC1400, it achieves a 21× speedup at nearly double its operating frequency. This performance gain is primarily attributed to the FPGA coprocessor, which reduces frequent memory access operations for data and instructions. These results indicate that for ultra-high-speed PMSM control, an FPGA coprocessor can significantly reduce digital system delays, thereby greatly simplifying the design of delay compensation algorithms. Moreover, thanks to coprocessor acceleration, the SVPWM module can achieve a switching frequency of 100 kHz, making it well-suited for modern power devices such as GaN, which are typically designed to operate at high frequencies (e.g., up to 70 kHz) due to physical constraints. 5. Conclusions and Future Work In this paper, an FPGA-based FOC coprocessor is designed. It performs current and speed PI control loops, an SMO-based rotor position estimation, and SVPWM generation in less than 1 µs. Its effectiveness is validated through both simulation and physical experiments. Thanks to its simple CPU interface and the use of normalized current and voltage values, the coprocessor can be easily integrated with various CPUs, eliminating the need for complex instruction extensions or delay-compensation algorithms. The design is expected to be applied in PMSM control, particularly for applications requiring high-speed response. Physical experiments have been conducted on a PMSM with a rated speed of 4200 rpm. However, since an ultra-high-speed PMSM is currently not available, only simulations have been performed on a machine rated at 170,000 rpm. Future work will include experimental validation using a physical ultra-high-speed PMSM. While the authors acknowledge that the SMO faces well-known challenges during low-speed operation, it is worth noting that dead-time compensation—implemented via the high-speed parallel processing capability of an FPGA—can significantly mitigate the adverse effects of inverter nonlinearities. This reduction in current distortion indirectly improves the signal-to-noise ratio of the back-EMF at low speeds, potentially extending the effective operating range of the SMO. Further investigation is required to validate this synergistic effect. Author Contributions Conceptualization, F.W.; methodology, Q.W.; writing—original draft preparation, F.W.; writing—review and editing, F.W.; visualization, H.H. and J.C.; supervision, F.W. All authors have read and agreed to the published version of the manuscript. Funding This paper was partially supported by Shenzhen Science and Technology Innovation Committee, contract number KJZD20230923115759015 and KJZD20240903101109013. Informed Consent Statement Not applicable. Data Availability Statement Data available upon reasonable request. Conflicts of Interest The authors declare no conflicts of interest. Appendix A Appendix A.1. System and Lyapunov Function The Lyapunov function candidate is chosen as: V = 1 2 ∥ i ˜ s ∥ 2 with the current estimation error as: i ˜ s = i s − i ^ s V ˙ = i ˜ s T d i ˜ s d t = i ˜ s T − R L i ˜ s + 1 L E ˜ s − 1 L λ tanh ( i ˜ s ) = − R L i ˜ s 2 + i ˜ s T L E ˜ s − λ tanh ( i ˜ s ) = − R L i ˜ s 2 + 1 L i ˜ s T E ˜ s − λ i ˜ s T tanh ( i ˜ s ) = − R L i ˜ s 2 + 1 L i ˜ α E ˜ α − λ i ˜ α tanh ( i ˜ α ) + i ˜ β E ˜ β − λ i ˜ β tanh ( i ˜ β ) (A1) with λ as the sliding mode gain. Since the first term is negative, ensuring stability reduces to guarantee that the second term is also negative. Appendix A.2. Stability Analysis of the Lyapunov Function Depending on | i ˜ s | , the stability is discussed separately. (1) Big signal case When | i ˜ α | is sufficiently large, tanh ( · ) ≈ sign ( · ) . The α branch and β branch are considered separately. Taking the α branch as an example, to make i ˜ α E ˜ α − λ i ˜ α tanh ( i ˜ α ) E ˜ α is sufficient to make this expression negative. If i ˜ α 0 (i.e., λ > − E ˜ α ) is sufficient to make the expression negative. Combining the two cases, λ > | E ˜ α | guarantees that the α branch is negative. Similarly, λ > | E ˜ β | guarantees that the β branch is negative. In summary, choosing λ > max | E ˜ α | , | E ˜ β | ensures the stability of the improved sliding mode observer (SMO) in the large-signal region. (2) Small signal case When | i ˜ s | is not sufficiently large, tanh ( i ˜ s ) ≈ i ˜ s , V ˙ = i ˜ s T d i ˜ s d t = − R L i ˜ s 2 + i ˜ s T L E ˜ s − λ tanh ( i ˜ s ) = − R L i ˜ s 2 + 1 L i ˜ s T E ˜ s − λ i ˜ s T tanh ( i ˜ s ) ≈ − R L i ˜ s 2 + 1 L i ˜ s T E ˜ s − λ i ˜ s T i ˜ s = − R + λ L i ˜ s 2 + 1 L i ˜ s T E ˜ s (A2) The goal is to show that there exists λ such that V ˙ 0 such that: ∥ E ˜ s ∥ ≤ k ∥ i ˜ s ∥ Under this assumption: i ˜ s T E ˜ s ≤ ∥ i ˜ s ∥ ∥ E ˜ s ∥ ≤ k ∥ i ˜ s ∥ 2 Substituting the above inequality into the expression for V ˙ : V ˙ ≤ − R + λ L ∥ i ˜ s ∥ 2 + k L ∥ i ˜ s ∥ 2 = − R + λ − k L ∥ i ˜ s ∥ 2 To ensure V ˙ 0 ⇒ λ > k − R Appendix A.3. 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RISC-V and coprocessor. RISC-V and coprocessor. Control Flow. Control Flow. Single-Sampling Dual-Updating. Single-Sampling Dual-Updating. SMO current observer (containing EMF observer). SMO current observer (containing EMF observer). Electrical angle and rotation speed estimation with PLL. Electrical angle and rotation speed estimation with PLL. Sector selection circuit. Sector selection circuit. Voltage space. Voltage space. Basic vector duty time. Basic vector duty time. Switch timing on three-phase power devices. ( a) T c m 1 , T c m 2 , and T c m 3 on phases A, B, and C; ( b) associated calculation circuit. Switch timing on three-phase power devices. ( a) T c m 1 , T c m 2 , and T c m 3 on phases A, B, and C; ( b) associated calculation circuit. Rotation speed comparison at different switching frequencies: The PMSM is out-of-step at 20 kHz (red line) but works well at 50 kHz (blue line). Rotation speed comparison at different switching frequencies: The PMSM is out-of-step at 20 kHz (red line) but works well at 50 kHz (blue line). Rotation speed and current waveforms at different switching frequencies: ( a) 20 kHz frequency; ( b) 50 kHz; ( c) 100 kHz. Rotation speed and current waveforms at different switching frequencies: ( a) 20 kHz frequency; ( b) 50 kHz; ( c) 100 kHz. Performance comparison between improved and traditional SMOs: ( a) traditional SMO: s g n ( · ) , no EMF feedback; ( b) traditional SMO: s g n ( · ) , with EMF feedback; ( c) improved SMO: t a n h ( · ) , no EMF feedback; ( d) improved SMO: t a n h ( · ) , with EMF feedback. Performance comparison between improved and traditional SMOs: ( a) traditional SMO: s g n ( · ) , no EMF feedback; ( b) traditional SMO: s g n ( · ) , with EMF feedback; ( c) improved SMO: t a n h ( · ) , no EMF feedback; ( d) improved SMO: t a n h ( · ) , with EMF feedback. Sensorless FOC speed regulation. Sensorless FOC speed regulation. Experiment platform for mid-speed PMSM. Experiment platform for mid-speed PMSM. Electrical angle estimated with the SMO in the coprocessor and corresponding rotational speed. Electrical angle estimated with the SMO in the coprocessor and corresponding rotational speed. Table 1. R-type instruction format and extended instructions. Table 1. R-type instruction format and extended instructions. bit field 31–25 24–20 19–15 14 13 12 11–7 6–0 function funct7 rs2 rs1 xd xs1 xs2 rd opcode ex rd 7’h01 not used s-idx1 1 1 0 d-idx 7’h7B ex wrt 7’h02 s-idx2 s-idx1 0 1 1 not used 7’h7B Table 2.T a , T b vs. sector index. Table 2.T a , T b vs. sector index. Sector I II III IV V VI T a −Z Z X −X −Y Y T b X Y −Y Z −Z −X T 0 ( T 7 ) T − T a − T b Note: all items are positive. Table 3. Ultra-high-speed PMSM parameters. Table 3. Ultra-high-speed PMSM parameters. Parameters of Ultra-High-Speed PMSM Value number of poles 1 pair operating voltage 280 V resistance (line-to-line) 44 Ω inductance (line-to-line) 78 µH rated speed 170,000 rpm Simulation Parameters Value proportional and integration parameters of current loop 2.45, 0.8 proportional and integration parameters of speed loop 0.5, 0.1 proportional and integration parameters of PLL 500, 30 sliding mode gain of improved SMO 0.5 sampling period of current loop, or SVPWM period 10 µs sampling period of speed loop 2 ms Table 4. Mid-speed PMSM parameters. Table 4. Mid-speed PMSM parameters. Parameters of Mid-Speed PMSM Value number of poles 7 pairs operating voltage 24 V stator resistance 32 Ω stator inductance 50 µH rated speed 4200 rpm Simulation Parameters Value proportional and integration parameters of current loop 0.5, 0.5 proportional and integration parameters of speed loop 0.4, 0.1 proportional and integration parameters of PLL 2000, 100 sliding mode gain of improved SMO 0.5 sampling period of current loop, or SVPWM period 10 µs sampling period of speed loop 2 ms Table 5. Variance and RMS of electrical angle estimations. Table 5. Variance and RMS of electrical angle estimations. SMO Models Variance RMS traditional SMO wo. EMF feedback 0.307 0.559 traditional SMO w. EMF feedback 0.118 0.349 improved SMO wo. EMF feedback 0.089 0.303 improved SMO w. EMF feedback 0.006 0.077 Table 6. Resource utilization on Xilinx Zynq-7020 FPGA. Table 6. Resource utilization on Xilinx Zynq-7020 FPGA. Dice CPU Co-Processor Total Available Utilization LUT 10,028 8303 18,331 53,200 69% Registers 9097 2986 12,083 106,400 23% Block RAM 32 0 32 140 46% DSP 0 68 68 220 62% Table 7. Computation speedups over other processors. Table 7. Computation speedups over other processors. Specifications HITSZ ST Infineon TI Our Design STM32G4 XMC1400 F2803X Working Freq. 32/100 MHz 170 MHz 48 MHz 60 MHz Comp. Time 100 kHz 20 kHz 20 kHz 20 kHz Architecture Coprocessor Cordic+CPU MATH+CPU MCU+CLA Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content. © 2026 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license. Wang, Q.; Wang, F.; Huang, H.; Chen, J. A High Speed Coprocessor Design for Sensorless PMSM Control. Electronics 2026, 15, 2464. https://doi.org/10.3390/electronics15112464 Wang Q, Wang F, Huang H, Chen J. A High Speed Coprocessor Design for Sensorless PMSM Control. Electronics. 2026; 15(11):2464. https://doi.org/10.3390/electronics15112464 Wang, Qingfeng, Fei Wang, Hongji Huang, and Jiangkangjian Chen. 2026. "A High Speed Coprocessor Design for Sensorless PMSM Control" Electronics 15, no. 11: 2464. https://doi.org/10.3390/electronics15112464 Wang, Q., Wang, F., Huang, H., & Chen, J. (2026). A High Speed Coprocessor Design for Sensorless PMSM Control. Electronics, 15(11), 2464. https://doi.org/10.3390/electronics15112464
